eInfochips has announced the availability of their NVMe Verification IP (VIP) and Post-silicon Validation Test Suite based on the latest available protocol standards (NVMe 1.2) from NVME.ORG body. This will accelerate product design schedules for R&D teams working on the next gen products, while reducing the product and performance risks. The eInfochips NVMe VIP will reduce the verification environment setup effort for ASIC (Application Specific Integrated Circuit) and FPGA (Field Programmable Gate Array) design verification. The eInfochips NVMe Post-Silicon Validation Test Suite will enable test scenarios including, and beyond the ones defined by UNH-IOL (University of New Hampshire Interoperability Lab). The company also offers Design, Verification and System Validation services for NVMe based flash storage products.
According to Dr. Ambar Sarkar, Chief Technologist at eInfochips, “NVMe has revolutionized the data I/O and throughput performance of flash based SSD storage products. Our reusable and customizable solutions on NVMe 1.2 are ideal to improve time-to-market with reduced design risk.”
NVMe Verification IP and Post Silicon Validation Test Suite
The eInfochips NVMe Verification IP supports the NVMe 1.2 Specification from NVMe.org. It is developed on SystemVerilog and supports UVM, OVM and VMM methodologies. The NVMe VIP offers exhaustive checkers and functional coverage with a bandwidth calculator per component per direction. It supports the RAL (Register Abstraction Model), while being interoperable with 3rd party VIPs as well. The eInfochips Post-Silicon Validation Test Suite offers test scenarios defined by UNH-IOL for conformance and interoperability. Additionally, it also covers other test scenarios for System-level Validation of the NVMe interface for greater confidence on the product design and performance. It supports Linux OS and Windows OS with an abstraction layer for designers to adopt the environment of their comfort.
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